1. Field of The Invention
The invention relates to the field of circuit interfacing and compatibility, and in particular to concurrent maintenance and hot-plugging of peripheral component interconnect (PCI) circuit cards.
2. Background Information
There are a variety of standard bus types and associated slot connectors currently in use in computer systems for interfacing with peripheral devices, including the currently popular PCI (Peripheral Component Interconnect) bus/slot standard, for example. Recently, new PCI bus specifications have been proposed, and two specifications, of particular interest are the "PCI Bus Hot Plug Specification 1.0" and "PCI Engineering Change Request--Addition of 3.3 V-AUX to connector," which can be individually used on a PCI slot.
Hot-plugging, sometimes also called "hot-swapping," refers to inserting and/or extracting a device while a system is "hot," i.e., powered-on. In mid-range to high-end computer systems, such as the IBM AS/400 (IBM and AS/400 are registered trademarks of International Business Machines Corporation, all rights reserved), because of the lost processing time and system overhead involved with shutting the system down, it is highly advantageous to be able to perform a number of maintenance operations on the computer system while the system is still running, and these operations are referred to as concurrent maintenance (CM) operations. In particular, failed or failing PCI circuit cards should be replaceable in a concurrent maintenance operation. The above-mentioned PCI Bus Hot Plug Specification provides a way of using standard PCI components in a system where the capability for hot-plugging of these components is to be made available.
The PCI BUS Hot-Plug Specification 1.0 Defines Hot Insertion as follows. A slot must be powered down and isolated from the bus before a PCI Adapter Card can be inserted. The process of making a slot ready, for insertion can vary from one platform and operating system to another. The following general sequence of steps is necessary to insert a PCI Adapter Card into a slot after it is powered down and ready for insertion. First, the user, e.g., computer system maintenance personnel, inserts the new Adapter Card. The user then notifies the Hot-Plug Service to turn on the slot containing the new Adapter Card. Next, the Hot-Plug Service issues a Hot-Plug Primitive to the Hot-Plug System Driver to turn on the appropriate slot. The Hot-Plug System Driver uses the Hot-Plug Controller to power up the slot; deassert RST# (reset) on the slot and connect the slot to the rest of the bus, in either order; and change the optional slot-state indicator to show that the slot is on.
The Hot-Plug Service notifies the operating system that the new Adapter Card is installed, so the operating system can initialize the Adapter Card and prepare to use it. Then, the Hot-Plug Service notifies the user that the card is ready.
The PCI Engineering Change Request, or "ECR," relating to power management mentioned above will now be explained. The PCI SIG Power Management Working Group has determined that in order to enable PCI bus power management to the full extent that the PCI Bus Power Management Interface Specification, Intel's Instantly Available PC and Microsoft's OnNow initiatives allow, PCI add-in devices need a dedicated and guaranteed source of power to keep the wake event card logic circuitry active while the rest of the PCI bus is without power. Power management includes shutting down a component that is not being used to place it in a standby condition in order to conserve energy, and then "waking up" the component by way of the wake event card logic circuitry when the component is needed. A previously reserved connector pin (14A) is proposed in this PCI ECR to be used as a 3.3 Vaux voltage supply to provide the standard source of power for the wake event card logic circuitry.
At least three assumptions have been made in this PCI ECR in determining the optimal solution for supplying auxiliary power to PCI add-in devices. The first was that add-in devices will need to function correctly in existing systems, which do not support Vaux, as well as in new Vaux capable systems. The second assumption was that the majority of add-in devices will not require Vaux. Because of this second assumption, the third assumption was that systems should not be required to provide Vaux capacity to handle worst case loading requirements.
The first and third assumptions have led to a need to provide mechanisms for budgeting the total available Vaux power, and for controlling the power consumption of Vaux capable devices. Power consumption of Vaux capable devices can be handled in one of two ways: either the motherboard could be designed to control Vaux current to individual slots, based on software control for example; or the add-in board could be made responsible for regulating its own current consumption based on software control, for example.
The PCI SIG Power Management working group selected the second option for this PCI ECR in view of the first two assumptions mentioned above. Therefore, add-in boards will need to be able to control their usage of Vaux to operate in legacy systems as well as in Vaux capable systems. The rationale is that, assuming the majority of cards will not need this capability, there is no need to burden an entire computer system with the cost for the capability. Cards which are designed to consume Vaux power will bear the costs for its incorporation.
The PCI SIG requirements for this 3.3 Vaux pin are that it meets the criteria set forth by the PCI SIG for defining a reserved pin. In particular, that it solves a long term need with broad application. The capabilities enabled by the PCI bus 3.3 Vaux pin address global energy utilization regulations that are becoming increasingly more important to buyers given the shortage of inexpensive, clean energy in many parts of the planet. The governmental energy regulations that will be supportable include but are not limited to Energy Star USA 30W standby.
The above-mentioned addition of a 3.3 V-AUX PCI pin as specified in the ECR, provides for PCI card power management support in a system, and the PCI Hot-Plug specification provides for a hot-plugging capability. However, a problem may arise if the two above-mentioned PCI bus features are used together on the same PCI slot.
From the Hot-Plug Specification, it can be seen that it specifies that the PCI slot in question is first powered down before the PCI card is inserted (or extracted). A PCI card should not, therefore, be hot-plugged directly into a PCI slot that has any pins "hot." This would include the 3.3 V-AUX pin of the PCI ECR, which pin is specified to be on even when the rest of the bus is powered down in order to keep wake event logic circuitry on a PCI card active.
Therefore, it is apparent that to use both the 3.3 Vaux pin capabilities, and hot-plug capabilities together, there needs to be a way that the 3.3 Vaux pin can be turned-on only after the PCI card is hot-plugged-in so as to comply with the PCI Hot Plug specification.
There is another PCI specification, the PCI Local Bus Specification 2.1, which provides for two PRSNTx# pins/signals which are used to indicate to the computer system that a PCI card is present in the PCI slot, and how much power the PCI card requires. Some defined signal combinations are set forth in the table below.
______________________________________ Expansion PRSNT1# PRSNT2# Configuration ______________________________________ Open Open No Expansion board present Ground Open Expansion board present, 25W max Open Ground Expansion board present, 15W max Ground Ground Expansion board present, 7.5W max ______________________________________
According to this PCI specification for the PRSNTx# pins, in providing the power indication, the expansion board (PCI card) must indicate the total maximum power consumption for the board. The system must assume that the expansion board could draw this power from either the standard 5 V or 3.3 V power rail. Further, if the expansion board is configurable, e.g., it provides sockets for memory expansion, etc., the pin strapping (as defined in the above table) must indicate the total power consumed by a fully configured (expanded) board, which may be more power than that consumed in its usual shipping configuration.
As can be seen, one or both PRSNTx# pins/signals are grounded by a PCI card when inserted in a PCI slot, so at least one of the PRSNTx# pins/signals will be low (ground) if a PCI card is present in the PCI slot.
From the above, it is apparent that a need exists for a way to use both the hot-plug capability and the power management capability in a single system while conforming with PCI bus industry standards.